This invention relates to a room temperature wet chemical growth (RTWCG) process of SiO-based thin film dielectrics on substrates including Si, Ge, III-V and I-III-VI compound semiconductors and, specifically, to the RTWCG of SiO-based films on silicon, and other substrates in the manufacture of silicon-based electronic and photonic (optoelectronic and/or microelectronic) device applications. One particular application involves the use of this room temperature wet chemical growth process to make optical components.
Silicon dioxide (SiO2) forms the basis of the planar technology. In industrial practice, insulator coatings for electronic and photonic device layers are most frequently formed by thermal oxidation of Silicon (Si) in the temperature range 900xc2x0 C. to 1200xc2x0 C. SiO2 is also deposited by chemical vapor deposition (CVD) techniques at lower temperatures (200xc2x0 C. to 900xc2x0 C.) on various substrates.
Thermal and CVD-grown SiO2 based layers are used as diffusion masks, to passivate device junctions, as electric insulation, as dielectric material in Si technology, and as capping layers for implantation-activation annealing in III-V compound semiconductor technology, to name a few.
The growth of insulator films at low temperatures is very attractive for most device applications due to reduced capital cost, and high output and technological constraints associated with the growth of dielectric thin films using conventional high-temperature growth/deposition techniques.
Dielectric films for photonic devices are well known in the art and are usually deposited at near room temperature on various substrates using physical vapor deposition processes including conventional (nonreactive) or reactive resistive, induction or electron beam evaporation, reactive or nonreactive dc or RF magnetron and ion-beam sputtering processes.
Room temperature growth of insulator layers on semiconductor surfaces using anodic oxidation is known in the art. Using anodic oxidation, up to 200 nm SiO2 layers can be grown on underlying Si substrates. The anodic oxidation process consumes about 0.43 of the thickness of the oxide from the underlying Si substrate, and is not compatible with most metallization schemes. This limits its application as a replacement of thermal or vacuum deposited SiO2.
Deposition of SiO2 insulator layers from solutions is known in the art using organo-metallic solutions. In this procedure, the insulator layer is applied onto the substrate either by dipping the substrate into the solution or by spinning the substrate after a small amount of the solution is applied onto the surface. In both cases the substrate is then placed in an oven to drive off the solvent.
Researchers from Japan, China and Taiwan describe processes for deposition of SiO2 and SiO2xe2x88x92xFx layers on glass and silicon surfaces using a slightly above room temperature (30 to 50 degrees C.) solution growth. The growth of liquid-phase deposited (LPD) SiO2, initially proposed by Thomsen et al. for deposition of SiO2 on the surface of soda lime silicate glass, is based on the chemical reaction of H2SiF6 with water to form hydrofluoric acid and solid SiO2. The initial H2SiF6 solution is saturated with SiO2 powder (usually in a sol-gel form). Before immersing the glass into the solution, a reagent that reacts with the hydrofluorosilicilic acid, such as boric acid, was added to the solution. Boric acid reacts with the hydrofluorosilicilic acid and makes the solution supersaturated with silica.
One of the major disadvantages of the SiO2 LPD method described above, is the very low deposition rate of about 8 nm/hour to about 24 nm/hour, making it impractical for growing insulator layers for most semiconductor device applications. Deposition rates of up to 110 nm/hour are claimed by Ching-Fa Yeh et al. in the hydrofluorosilicilic acid-water system and the composition of the resulting films was reported to be SiO2xe2x88x92xFx where x is about 2%. Our own experimentation using the LPD method, seems to indicate that the LPD SiO2 has poor adhesion to the Si surfaces, and the maximum growth rate we obtained is smaller than the reported values (less than 25 nm/hour). Even assuming that the reported 110 nm/hour deposition rates are possible, these deposition rates are still too low since, assuming that the deposition rate is constant with the deposition time, it will require about 9 hours to deposit an oxide with a thickness of about 1 xcexcm needed for ULSI interlevel dielectric.
The term RTWCG process of SiO-based insulator layers, as used herein, means, a room temperature (e.g., 10xc2x0-50xc2x0 C., or preferably about 15xc2x0-30xc2x0 C.) wet chemical growth process of silicon oxide layers. While this layer is referred to in this application as a xe2x80x9csilicon oxide layerxe2x80x9d, this means a layer comprising of SixOyXz (SiOX) layers where x is from 0.9 to 1.1, y is from 0.9 to 1.9 and z is from 0.01 to 0.2 [Si stands for silicon, O stands for oxygen, and X is either fluorine (F), carbon (C) or a combination of these with iron (Fe), palladium (Pd), or titanium (Ti) contaminants, depending on the catalyst and the redox system being used]. The room temperature wet chemical growth process of the present invention can be used to deposit thin films with a range of refractive indices. This capability enables the process to be used for the manufacture of optoelectronic devices including for example, fiber-optic cable, and waveguides.
Waveguides are now known and used for multiplexing or demultiplexing multiple channels. These devices typically include nano-scale planar optical pathways that confine an optical beam by internal reflection similarly to an optical fiber, but with a rectangular (or square) cross-section. Suitable substrates include silicon and gallium arsenide. Of particular advantage is the fact that the structure can be integrated at the chip level with various microelectronic, MEMS, optical or optoelectronic devices as desired. The technology also encompasses the production of wafer-scale integration of multiple application specific computer chips. These could use light instead of aluminum or copper interconnects. Optical waveguides could be the last step in fabricating such a device since formation can be accomplished without having to raise the temperature of the wafer to accomplish growth. The waveguide definition can be accomplished using standard photolithographic processing.
This invention relates to a room temperature wet chemical growth (RTWCG) process of silicon oxide (SiO) based thin film dielectrics on semiconductor substrates and, specifically, to the RTWCG of SiO-based films on silicon as well as other materials in the manufacture of silicon-based electronic and photonic (optoelectronic) device applications.
It is an object of the invention to provide a silicon oxide-based film using a room temperature wet chemical growth (RTWCG) process for electronic and photonic (optoelectronic) device applications that is compatible with device fabrication steps, has large growth rates, low stress, good adhesion to silicon and silicon oxide coated surfaces, is stable on long term air exposure, and high temperature annealing, and that has very good conformity.
It is a further object to provide a silicon oxide-based RTWCG process of low dielectric constant SiO based films for use as intermetallic dielectric (IMD) and interlevel dielectric (ILD) in ultra large scale integrated (ULSI) silicon based microelectronics.
It is a further object to provide an ultra thin film silicon oxide-based RTWCG process to be used as gate dielectric for ULSI silicon based microelectronics.
It is a further object to provide a silicon oxide-based RTWCG process of thin film insulators to be used as passivation layers for photonic (optoelectronic) device applications.
It is a further object to provide a silicon oxide-based RTWCG process to grow passivating/antireflection coatings, after the front grid metallization for the fabrication of low cost silicon solar cells and for other photonic (optoelectronic) device applications.
It is a further object to provide a silicon oxide-based RTWCG deposition process to be used as passivating films for porous silicon coated photonic (optoelectronic) devices.
It is a further object of this invention to utilize the room temperature wet chemical growth process for the manufacture of optoelectric devices including fiber optic cable and waveguides.
High growth rates of SiOX oxides according to this invention are grown on planar or porous silicon using, for example, commercial grade H2SiF6 (34% by weight in an aqueous solution) as silicon source, N-n-butylpyridinium chloride (C9H14ClN) and xe2x80x9credoxxe2x80x9d or oxidation/reduction aqueous solution based on Fe2+/Fe3+, e.g. K3Fe(CN)6 and/or iron ethylenediaminetetraacetic acid (Fe EDTA). For convenience, the above class of solutions we will call the basic growth solution. The basic solution (BS) can be saturated with SiO2-containing sources such as silica gel. Catalysts such as palladium II trifluoroacetate [Pd(O2C2F3)2] (PdFAc) and H2TiF6 aqueous solutions are used to increase the growth rate. NaOH, KOH, NaF and NH4F and HF solutions are used according to this invention to adjust the pH of the growth solution. The RTWCG rate on Si surfaces is from 2 nm/minute to 70 nm/minute, depending on the composition of the solution, pH, and crystallographic orientation of the Si substrates. The chemical composition of the grown layer has the general formula: SixOyXz, where the significance of Si, O, X, and x, y and z are as explained above.